1. Field of the Invention
The invention relates to a charge-pump circuit, and more particularly to a high-speed, low-noise charge pump for use in a phase-locked loop (PLL).
2. Description of the Related Art
In recent years, the rapid growth of cellular communications systems has motivated an increasing demand for high performance integrated radio frequency (RF) components. One of the most important building blocks of these systems is the local oscillator (LO). The need for a well defined and highly stable signal for the local oscillator makes necessary the use of phase-locked loop (PLL) techniques to satisfy the stringent requirements of wireless standards. With reference to FIG. 1, a block diagram of a typical PLL 100 is illustrated. Briefly, the PLL 100 includes a phase detector 110, a charge pump 120, a loop filter 130, a voltage-controlled oscillator (VCO) 140 and a frequency divider 150. The PLL 100 receives a reference clock signal CLKref having a frequency Fref and generates an output clock signal CLKout having a frequency Fout that is synchronized with the reference clock signal CLKref in phase.
The reference clock signal CLKref is fed to the phase detector 110, where it is compared with a feedback signal CLK'out. Based on this comparison, the phase detector 110 generates a pump-up signal UP and a pump-down signal DN which, in turn, direct the charge pump 120 to either deposit charges on or remove charges from the loop filter 130 where a voltage Vc is developed for adjusting the output frequency of the VCO 140. The output of the VCO 140, which is the output of the PLL 100, is coupled to the frequency divider 150. The feedback signal CLK′out may be the same as the output clock signal CLKout from the VCO 140, or as illustrated in FIG. 1 the feedback signal CLK′out may be the output of the frequency divider 150. Although the frequency divider 150 is commonly used in the PLL 100 to divide the frequency received from the VCO 140 by N, it may be eliminated in certain applications.
The charge pump 120 generates a current ICP that controls the output frequency of the VCO 140. The current ICP is dependent on the UP and DN signals from the phase detector 110. When the rising edge of CLKref leads the rising edge of CLK+out, the charge pump 120 increases ICP to develop a larger Vc across the loop filter 130 which, in turn, cause the VCO 140 to increase the frequency of CLKout. Conversely, when CLKref lags behind CLK′out, the charge pump 120 decreases ICP to develop a smaller Vc across the loop filter 130 which, in turn, cause the VCO 140 to decrease the frequency of CLKout. When the feedback frequency F′out is ultimately locked onto the reference frequency Fref, i.e. the phases of the two signals CLKref, CLK′out are aligned, the voltage Vc is not adjusted and the output frequency Fout is kept constant. In this state, the charge-pump PLL 100 is said to be in a “locked” condition.
With reference to FIG. 2, a schematic diagram of a conventional charge pump 220 is illustrated. The charge pump 220 includes a “pump-up” current mirror 222 and an associated switching transistor M25. Also, the charge pump 220 includes a “pump-down” current mirror 224 and an associated switching transistor M26. The switching transistor M25 is connected to the switching transistor M26 at an output node 225. The current mirror 222 includes an input mirror transistor M21 having a gate coupled to the gate of an output mirror transistor M23. The sources of transistors M21 and M23 are coupled to a voltage supply VDD. The drain of the transistor M21 is coupled to its gate in order to guarantee that the transistor M21 remains in the saturation region. The drain of the transistor M23 is coupled to the source of the switching transistor M25. In a similar fashion, the current mirror 224 includes an input mirror transistor M22 having a gate coupled to the gate of an output mirror transistor M24. The sources of transistors M22 and M24 are tied together to ground. The drain of the transistor M22 is coupled to its gate and the drain of the transistor M24 is coupled to the source of the switching transistor M26. The drains of switching transistors M25 and M26 are coupled to the output node 225. The transistors M21 and M23 involved in the “pump-up” current mirror 222 as well as the associated switching transistor M25 are implemented with the p-channel MOS transistors. Conversely, the transistors M22 and M24 involved in the “pump-down” current mirror 224 as well as the associated switching transistor M26 are the n-channel MOS transistors.
A reference current source 226 providing a supply current IREF is disposed between the drains of the input mirror transistors M21 and M22. Based on control signals applied to the gates of the switching transistors M25 and M26 by a phase detector (which would be connected to the charge pump 220 as shown in FIG. 1), the supply current IREF is mirrored through either the “pump-up” current mirror 222 or through the “pump-down” current mirror 224 to direct an output current ICP to or from the output node 225. When a control signal UP is asserted, the switching transistor M25 is turned on and the supply current IREF is mirrored in the M23–M25 branch. The current mirror 222 thereby provides a “pump-up” current IUP substantially equal to IREF. Conversely, when a control signal DN is asserted, the switching transistor M26 is turned on and the supply current IREF is mirrored in the M24–M26 branch. The current mirror 224 thereby provides a “pump-down” current IDN substantially equal to IREF. The output current ICP at the output node 225 is the sum of IUP and IDN accordingly.
In RF transmitters, it is desirable to employ a charge pump capable of providing a relatively high switching speed. Nevertheless, the conventional charge pump 220 suffers from high switching noise while operating at higher speed. In addition to high switching noise, the use of the conventional charge pump 220 limits the range of voltages over which the output current may be generated. This results from the lower output impedance of the current mirrors 222 and 224. Therefore, the conventional charge pump 220 is not applicable to high-speed applications. To address these disadvantages, a source-switched charge pump having cascoded output is disclosed in U.S. Pat. No. 6,160,432 granted to Rhee et al. on Dec. 12, 2000. It is shown that Rhee's charge pump enhances the isolation of switching noise. However, the switching speed is still not high enough because Rhee's charge pump requires a considerable turn-on time to deal with a large amount of charge accumulation on the parasitic capacitance of MOS transistors. Furthermore, Rhee's charge pump may have a current matching problem caused by variations of manufacturing process.
In view of the above, what is needed is a high-speed low-noise charge pump that overcomes the disadvantages of the prior art.